HOUSTON – (May 21, 2026) – Researchers have developed a novel chip-making technique that exploits stress within a material's crystal structure to create nanoscale patterns at room temperature directly onto hard substrates like silica. This method could simplify the fabrication of advanced electronic devices.
The technique, reported in a recent study, involves applying mechanical stress to a crystalline material, causing it to fracture in a controlled manner along specific crystal planes. These fractures form precise nanoscale patterns without the need for traditional lithography or high-temperature processes.
According to the research team, the approach works on a variety of hard materials commonly used in electronics, including silicon dioxide (silica). The patterns can be as small as 10 nanometers, offering a potential pathway to cheaper and more efficient chip production.
Further details, including the specific materials and stress application methods, are available in the full study published in a peer-reviewed journal. The work was conducted at a major research university in Texas.
